1、Dell Computer Corporation ConfidentialDocument No. COR.40.WWP.SQ.0023 Rev 2.0 1 of 28 PCBAPCBA QualityQuality ProcessProcess AuditAudit Information and Instructions PURPOSE 1. This document was developed as an Audit Tool for SQEs to assess the PCBA Manufacturing Process used by a PCBA Supplier. 2. T
2、o communicate Dells Manufacturing Capability expectations to PCBA Suppliers. 3. The document is intended to provide a roadmap for PCBA Manufacturing Capability improvement and thus improve the quality of the product delivered to Dell and the Dell Customer Experience. SCOPE The PCBA Audit Document is
3、 intended to be used for suppliers/manufacturers of PCBA Products. This includes, Dell Designed Motherboards, OEM Motherboards, Graphics Cards, Comm Cards, Sound Cards, Dell Designed Peripherals, etc. AUDIT STRUCTURE and QUESTIONS The Audit breaks down the PCBA Manufacturing Process into individual
4、process steps, each of which is represented by an individual worksheet. Within each worksheet is contained a series of questions specifically pertaining to the process being examined. These questions are focused on evaluating Process Disciplines, Control Methods, Process Capability/Technology, and A
5、ttention to Detail in how a Process is set-up and operated. A green color code is used to highlight those questions which are considered Process Inputs, and a yellow color is used to highlight those questions considered as Process Outputs. Coupled with the above, the questions were devised and devel
6、oped as closed questions with every attempt to avoid ambiguity. Because of the closed nature of the questions, there can only be one of two answers to any question, i.e. Yes or No. Thus, the score awarded for any question listed is binary. The criterion is either fully met or it is not. If the Crite
7、rion is met, a score of 1 is obtained. If the Criterion is not met, a score of 0 is obtained. If there is any doubt as to the score to award for any given Criterion, than a score of zero shall be awarded. Any Criterion that scores 1 shall be clearly demonstrated, followed, and be beyond reproach. PC
8、BA COMPLEXITY and CAPABILITY MATCHING Under each worksheet, there are five product categories shown. All products supplied to Dell as a PCBA will fall into one of these categories:- Hi MB: This category includes all Dell designed and OEM Motherboards that have an OFE of greater than 13000. Lo MB: Th
9、is category includes all Dell designed and OEM Motherboards that have an OFE of lower than 13000. Portables: This category includes all Dell Designed and OEM Portable products. Hi Periph: This category includes Graphics, and Hi End Comms the Best Known Practice Checklist. This document takes some of
10、 these critical criteria and defines the Best Known Practices in the industry to achieve these expectations. Thus, the PCBA Process Audit document, coupled with the PCBA Best Known Practice Checklist, provide a detailed roadmap to improve PCBA Manufacturing Capability and thus improve the quality of
11、 the product delivered to Dell and the Dell Customer Experience. It is clear from the use of these tools that the opportunity for improvement is self evident from the questions that scored zero. While striving for continuous improvement in all processes is encouraged, the expectation is that the sup
12、plier/facility will prioritize and target those actions that will deliver the biggest immediate impact to VLRR and the Dell Customer Experience. AUDIT BY SELF-ASSESSMENT It is expected that the supplier will conduct a self assessment of its own facilities that supply Dell product before and after th
13、e official Dell visit. The purpose of conducting such self assessments is to calibrate the site using the tool and to measure improvement going forward. However, the official score awarded is that which is given by the Dell SQE at the time of the audit and none other. Any claimed improvements in sco
14、re will not be considered official until they have been physically validated by Dell SQE onsite at the supplier. During the audit process, the Dell SQE may wish to review every question/criterion listed on the audit document, or the SQE may choose only to focus on those questions for which the suppl
15、ier awarded themselves a score of 1 by self-assessment. The path taken is left to SQE discretion. However, the SQE is charged with the responsibility to search for evidence that each criterion is clearly demonstrated, followed, and beyond reproach in the spirit of which the criterion was intended. T
16、RAINING The PCBA Process Audit is very heavy in technical content. SQEs who use this tool are considered within Dell as being sufficiently qualified to conduct this audit. To obtain this qualification, an SQE will have participated in at least three audits and lead a fourth under supervision of a qu
17、alified auditor. SQEs wishing to use this tool should contact their regional champion to arrange for training and qualification. ADDITIONAL QUESTIONS Please contact William Ryan at 512-725-1393 or william_d_ryan. REVISION HISTORY A00 Initial Release. Oct 1996 (EMF Controlled Document) A01 Minor corr
18、ections. Dec 1996. (EMF Controlled Document) Rev 1.4 Addition of RMA and Test Update. Jan 1999. (Initial Release as a Corporate Document) Rev 2.0 Extensive Review and Re-Write. July 2002. Dell Computer Corporation ConfidentialDocument No. COR.40.WWP.SQ.0023 Rev 2.0 3 of 28 PCBAPCBA QualityQuality Pr
19、ocessProcess AuditAudit Main Menu Paste Printing Placement Reflow Manual Assembly Wave Soldering Post Wave Mechanical Assy Rework detection, delay, trigger, duration, and stop, be clearly explained by a technician? Other method = 0 3.3Is the detection, delay, trigger, duration, and stop, controls pe
20、rforming as expected? Other method = 0 3.4Is there a feedback link between the conveyor speed and the flux applicator to auto-compensate for changes? Other method = 0 3.5Is there an automatic sensor that indicates when a flux drum is near empty? 3.6Is there a test used to check the quantity of flux
21、applied to the board to ensure it is optimum? 3.7Is there a test used to check the coverage of flux applied to the board to ensure it is sufficient? 4. Wave Set-UpHi MBLo MBPortables Hi Periph Lo PeriphActual 4.1Has specifying the Solder Pump Speed value been discontinued as a way to achieve the des
22、ired Wave Height? 4.2Is the relationship between Wave Height set-up and Contact Area/Length known for the product being processed? 4.3Is there a Quartz Plate available to verify Contact Area/Length achieved for the board being processed? 4.4Is the documented Contact Area/Length being achieved for th
23、e Wave Height set-up used? 4.5Does the shape of the Contact Area indicate parallelism? 4.6Does the Contact Length coupled with the Conveyor Speed, achieve the documented dwell time requirement? 4.7Is there evidence that Contact Area/Length and shape verified after Solder Pot removal and replacement,
24、 and maintenance? 4.8Is there evidence that the Contact Area/Length and shape verified on addition of solder or on adjustment of lead clearance? 4.9Does the board/pallet exit the Solder Pot in the stagnant area for the set conveyor angle and lead clearance? 4.10 Are all conveyor Fingers in a good st
25、ate of repair? Menu Dell Computer Corporation ConfidentialDocument No. COR.40.WWP.SQ.0023 Rev 2.0 Page 15 of 28 4.11 Is the quantity, type and spacing of each Finger design defined for the conveyor? 4.12 Has the pot been set up to run with an intermittent wave so as to reduce dross build up? If gap
26、between subsequent PCBAs too small, score 1 4.13 Does the level of Dross in the pot suggest that the pot is dedrossed at least once every 8 hours? 5. Temperature ProfileHi MBLo MBPortables Hi Periph Lo PeriphActual 5.1Is there available a Temperature Profile for the product currently being built? 5.
27、2Is the Temperature Profile assessable and readily available to operators / technicians as and when required? 5.3Were the Pre-Heat Set Points, Conveyor Speed, and Solder Temperature logged for that Thermal Profile when it was conducted? 5.4Do the Set Points, Conveyor Speed & Solder Temp written on t
28、he Thermal Profile correspond to the current Program settings? 5.5Is there available an Engineering based specification to detail the acceptable process window for Temperature Profiles? 5.6Was the Engineering based spec. derived from the Flux manufacturers recommendations but controls to a narrower
29、window? 5.7Does the product Temperature Profile fall within the Engineering based specification for the process window? 5.8Does the product Temperature Profile fall within the Engineering based specification for glass transition temperature requirements? 5.9Can any excursions outside of the process
30、window be justified and supported with hard evidence and logical analysis? 5.10 Are the boards used to establish the initial Thermal Profile kept as engineering samples? 5.11 Have at least five thermocouples been used at various points on the board to establish the Thermal Profile? 5.12 Is there a d
31、ocumented and systematic approach used to identify the most appropriate locations to attach the thermocouples? 5.13 Is there evidence that each thermocouple ball was bonded to a board joint using HTS or Conductive Epoxy? 5.14 Is the top side Temperature Profile low enough to prevent secondary reflow
32、? Must be below 160 degrees C. 5.15 Has a Calibration Profile been established in order to detect machine performance degradation? 5.16 Is there a documented frequency for running a Calibration Profile and was it established based upon historical performance data? 5.17 Is there evidence to demonstra
33、te that Calibration Profiles are conducted and that records are up-to-date? 5.18 Is the practice of comparing the current Calibration Profile to the Standardized Calibration Profile used to identify changes? 5.19 Is the current Calibration Overlay/Profile used to determine if a variation in the wave
34、s thermal characteristics has occurred? 5.20 Is the current Calibration Overlay/Profile used to determine if a variation in conveyor speed has occurred? 5.21 Is there evidence to demonstrate that action was taken when the Calibration Profile was different to the Standard? 5.22 Is a tool, such as a W
35、aveRider, used with a standardized profile to conduct a Calibration Profile? 5.23 Is there a policy for maximum number of thermal excursions allowable per board? 5.24 Is this policy known to and practiced by the operators? 6. Solder AnalysisHi MBLo MBPortables Hi Periph Lo PeriphActual 6.1Is there a
36、 documented frequency for conducting Solder Analysis and was this frequency established based upon historical results? 6.2Is there evidence to demonstrate that Solder Analysis records are up-to-date? 6.3Does the Solder Analysis results suggest that contaminants within the solder pot are within accep
37、table levels? 6.4Is there evidence to demonstrate that action was taken when Solder Analysis results were unsatisfactory? 7. Manual InspectionHi MBLo MBPortables Hi Periph Lo PeriphActual 7.1Are outputted boards 100% inspected post wave for wave solder defects as part of machine performance control?
38、 7.2Are Workmanship Standards defined for soldering, and are they accessible so that machine performance can be measured accurately? 7.3Is Measles Charting used to identify the common location of defects so actions can be taken to eliminate them? 7.4Is via penetration to board topside satisfactory?
39、Maximum Score828078747482 Score Obtained000000 Score Percentage0% Pass Percentage80%80%80%80%80%80% Outcome Not Audited Not Audited Not Audited Not Audited Not Audited Not Audited Dell Computer Corporation Confidential Document No. COR.40.WWP.SQ.0023 Rev 2.0 Page 16 of 28 PCBAPCBA QualityQuality Pro
40、cessProcess AuditAudit Add a Y to the Box if the Process Was Assessed Post Wave Soldering #Audit CriterionHi MBLo MBPortables Hi Periph Lo PeriphActual 1. Automatic Inspection1 or 0 may only be entered. NA is not a valid response. 1.1Are AOI or AXI methods, which include solder joint inspection, use
41、d post-wave?NA 1.2Is the AOI/AXI coverage % calculated based on joints/components inspected and those not inspected?NA 1.3Are the components/joints not covered by AOI/AXI documented and known and targeted for visual inspection?NA 1.4Can it be demonstrated that the machine calls are reviewed by the o
42、perator to determine if real or false?NA 1.5Can it be demonstrated that operators have been fully trained and certified to interpolate the AOI/AXI images presented?NA 1.6Does the ICT pareto of defects suggest that AOI/AXI is being 100% deployed and is being effective?NA 1.7Can a feedback mechanism b
43、e clearly demonstrated from ICT to AOI/AXI to improve program and operator effectiveness?NA 1.8Are changes to AOI/AXI coverage made based only on performance feedback?NA 2. Work InstructionsHi MBLo MBPortables Hi Periph Lo PeriphActual 2.1Is there a revision controlled Operator Work Instruction whic
44、h contains information for the specific product being inspected? 2.2Is there a visual aid available which identifies the populated PTH locations with polarity, and also the no-pop locations? 2.3Do the Work Instructions specify the specific solder/flux/cleaning agent etc. to be used? 2.4Do the Work I
45、nstructions define acceptable lead lengths and/or specific customer requirements? 2.5Have all connector heights/lean acceptance and assembly requirements been addressed from the PCBA Assembly Drawings? 2.6Are Work Instructions also used as an alert to flag specific customer or known issues? 2.7Do th
46、e Work Instructions specify the specific inspection stamps and locations to be used? 2.8Do Work Instructions require AOI/AXI Paper Less Repair (PLR) data to be evaluated? No PLR = 0NA 3. Manual InspectionHi MBLo MBPortables Hi Periph Lo PeriphActual 3.1Are outputted boards 100% inspected for wave so
47、lder defects and for lead evidence? 3.2Are outputted boards 100% inspected for missing PTH components & polarity, and raised/tilted PTH components? 3.3Are outputted boards 100% inspected for those components and joints not covered by ICT or AOI/AXI? 3.4Are Workmanship Standards defined for soldering
48、, and are they accessible and used to determine board acceptability? 3.5Are AOI/AXI Paper Less Repair (PLR) Stations effectively used at inspection for the evaluation of AOI/AXI defect calls?NA 3.6Is there a software tool post reflow which is linked to CAD or program data to facilitate component ide
49、ntification and inspection? 3.7Is it evident that lead snipping has been minimized through adequate component prep and/or pallet support design? 3.8Is there a tool available and used to check component lead length against the required lead length specification? 3.9Is it evident that only those leads which exceed the specification for component lead length are snipped? 3.10 Are magnification and lighting tools available to the operator at the inspection station? 3.11 Are self calibrating Soldering Irons, (like Metcal) used 100% post wave?NANA 4. Process ControlHi MBLo MB
